Bo Yi, associate professor. He is currently working at the School of Integrated Circuit Science and Engineering at the University of Electronic Science and Technology. He received the doctor‘s degree from the School of Microelectronics and Solid-State Electronics at the University of Electronic Science and Technology under professor Chen Xingbi's supervision. 

His research interest includes silicon-based power devices, wide bandgap and ultra-wide bandgap semiconductor power devices. He has published more than 40 academic papers on IEEE Trans. TPE, IEEE EDL, IEEE Trans. TED, et.al and owns 19 Chinese invention patents.

Selected Publications:

[1] B. Yi, Xu, Y., Cheng, J., Huang, H., Kong, M., & Yang, H.  Investigation of a Novel Enhancement-Mode Al0.25Ga0.75N/AlN/AlxGa(1-x)N/GaN MIS-HEMT for high Vth and Low Ron,sp，70(7), IEEE Transactions on Electron Devices, 2023. July.

[2] B. Yi, Zhang, S., Zhang, Z., Cheng, J., Huang, H., Kong, M., & Yang, H. (2023). Analytical model and simulation study of a novel enhancement-mode Ga2O3 MISFET realized by p-GaN gate. Semiconductor Science and Technology.,2023 June.01.

[3] B. Yi, Z. Wu, J. J. Cheng, et al, “Simulation Study of a p-GaN HEMT With an Integrated Schottky Barrier Diode,” , IEEE Transactions on Electron Devices, vol. 68, no. 12, pp. 6039 - 6045, 2021.

[4] B. Yi, Z. Wu, Q. Zhang, et al, A low loss single-channel SiC trench MOSFET with integrated trench MOS barrier Schottky diode, Semiconductor Science and Technology, Jul. 2021, 36(7): 075006.

[5] B. Yi, Zheng Wu, Junji Cheng, HaiMeng Huang, MouFu Kong, HongQiang Yang*, A Vertical Thin Layer pLDMOS with Linear doping realizing ultra-low Ron,sp, ASICON, Oct. 2021.

[6] Zheng Wu, Chao Xia, B. Yi*, Junji Cheng, HaiMeng Huang, MouFu Kong, HongQiang Yang, WenKun Shi, A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances, ASICON, Oct. 2021.

[7] B. Yi, J. Lin, B. Zhang, J. Cheng, Y.  Xiang, “Simulation Study of a Novel Snapback Free Reverse-Conducting SOI-LIGBT With Embedded P-Type Schottky Barrier Diode,” IEEE Transactions on Electron Devices, vol. 67, no. 5, pp. 2058-2065, May. 2020.

[8] B. Yi, X. T. Xie, M. F. Kong et al. “A Novel Diode-Clamped Carrier Stored Trench IGBT With Improved Performances,” IEEE Transactions on Electron Devices, vol. 67, no. 1, pp. 243-248, Jan. 2020.

[9] R. X. Chen, B. Yi*, X. B. Chen, “Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current”, IEEE Journal of the Electron Devices Society, vol. 8, pp. 195-199, 2020.

[10] B. Yi, J. Lin, H. Hu et al. “Simulation Study of a Novel Thin layer SOI Carrier-Stored TLIGBT with self-biased pMOS”, Semiconductor Science and Technology, accepted, 2019.

[11] B. Yi, J. Lin, J. Y. Wu et al. “An Novel Thin Layer SOI Carrier-Stored Trench LIGBT with Enhanced Emitter Injection”, IEEE Journal of the Electron Devices Society, vol. 7, no. 1, pp. 936-942, 2019.

[12] B. Yi, M. F. Kong, J. Lin, J. J. Cheng, H. M. Huang and X. B. Chen, “A 600 V Super-Junction p-LDMOS with Auto-controlled Electron Current to Enhance Current Capability,” IEEE Transactions on Electron Devices, vol. 66, no. 5, pp. 2314 - 2320, 2019.

[13] B. Yi, J. J. Cheng and X. B. Chen, “A High-voltage “Quasi-p-LDMOS” using Electrons as Carriers in Drift Region Applied for SPIC,” IEEE Trans. on Power Electronics, vol. 33, no. 4, pp. 3363 – 3374, 2018.

[14] B. Yi, M. F. Kong, J. J. Cheng, “Simulation Study of a p-LDMOS with Double Electron Paths to Enhance Current Capability,” IEEE Electron Device Letters, vol. 39, no. 11, pp. 1700 – 1703, 2018.

[15] B. Yi and X. Chen, “A 300 V Ultra Low Specific On-Resistance High-Side p-LDMOS with Auto-biased n-LDMOS for SPIC,” IEEE Trans. on Power Electronics, vol. 32, no. 1, pp. 551-560, 2017.

[16] B. Yi, J. J. Cheng, M. F. Kong and X. B. Chen, “A High-Voltage p-LDMOS with Enhanced Current Capability Comparable to Double RESURF n-LDMOS,” in Proc. ISPSD, pp. 148-151, May. 2018.

[17] B. Yi, Z. Lin and X. B. Chen, “Snapback-free reverse-conducting IGBT with low turnoff loss,” Electronics Letters, vol. 50, no. 9, pp. 703-705, 2014.

[18] B. Yi, Z. Lin and X. B. Chen, “Study on HK-VDMOS with Deep Trench Termination,” Superlattices and Microstructures, vol. 75, pp. 278-286, 2014.

[19] B. Yi, H. Hu, J. Lin, et al. “SiC trench MOSFET with integrated side-wall schottky barrier diode having P⁺ electric field shield,” IEICE Electronics Express, vol. 16, no. 5, pp. 1-10, 2019.

[20] B. Yi, M. F. Kong, P. Li, et al. “A New Carrier Stored Trench IGBT Realizing Both Ultra Low Von and Turn-off loss”, in Proc. IEEE 13th Power Electronics and Drive Systems, Jul. 2019.