程骏骥中文主页电子科技大学主页平台管理系统

程骏骥

副教授硕士生导师
性别：男
毕业院校：电子科技大学
学历：博士研究生毕业
学位：工学博士学位
在职信息：在职人员
所在单位：集成电路科学与工程学院（示范性微电子学院）
学科：微电子学与固体电子学
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个人简介

程骏骥，男，博士，副教授，硕士生导师，加拿大多伦多大学访问学者，任职于电子科学与工程学院(国家示范性微电子学院)、电子薄膜与集成器件国家重点实验室。师从中国科学院院士、IEEE FELLOW、被誉为“中国功率器件领路人”的陈星弼先生，在新型功率半导体器件及其集成电路方向上已有超过十三年的科研生涯。在IEEE Electron Device Letters、IEEE Trans. on Electron Devices、IEEE ISPSD等期刊和国际会议上发表学术论文超过50篇，在第24届IEEE ISPSD上发表的学术论文被遴选为当期会议仅有的2篇LATE NEWS PAPERS之一，近期发表的部分研究工作被TI公司FELLOW和UT-Dallas大学关注。主持了国家自然科学基金、国家重点实验室基金、中央高校基本业务费、省自然科学基金、省科技厅等项目，参与了国家自然科学基金重点项目、国家重点实验室自主课题、院士工作站、教育部博士点基金等项目，授权发明专利七项，七次应邀出席国际会议并四次担任技术委员会委员。国家科技部、国家学位论文中心、四川省和成都市在库专家和顾问，国际电气和电子工程师协会会员，常年担任IEEE Trans. on Power Electronics、Trans. on Electron Devices等权威期刊的审稿专家。担任《半导体物理》、《通信电子电路》等课的教学工作，教学认真亲切、关心热爱学生，教学效果良好，深受学生喜爱，所有课程评教均为五星优秀，连续四年获得学院“卓越青年教师培养计划”教学奖，获得电子科技大学第十一届本科教学优秀奖。

部分论文：

[1] Junji Cheng*; Haimeng Huang; Bo Yi; Weijia Zhang; W. T. Ng; A TCAD Study on Lateral Power MOSFET With Dual Conduction Paths and High-k Passivation, IEEE Electron Device Lett., 2020, 41(2): 260-263. SCI.

[2] Junji Cheng*; Xingbi Chen; “A practical approach to enhance yield of OPTVLD products,” IEEE Electron Device Letters, v 34, n 2, p 289-291, 2013, SCI.

[3] Junji Cheng*; Shiying Wu; Bo Yi; Haimeng Huang; Zhiming Wang; Guoyi Zhang, "A Lateral Power p-Channel Trench MOSFET Improved by Variation Vertical Doping," in IEEE Transactions on Electron Devices, 2021,SCI.

[4] Junji Cheng*; Weizhen Chen; Ping Li; Improvement of Deep-Trench LDMOS With Variation Vertical Doping for Charge-Balance Super-Junction, IEEE Trans. Electron Devices, 2018, 65(4): 1404-1410. SCI.

[5] Junji Cheng*; Weizhen Chen; Jingjie Lin; Ping Li; Bo Yi; Haimeng Huang; Xingbi Chen; Potential of Utilizing High-k Film to Improve the Cost Performance of Trench LDMOS, IEEE Trans. Electron Devices, 2019, 66(7): 3049-3054. SCI.

[6] Junji Cheng*; Xingbi Chen; “New planar junction edge termination technique using OPTVLD with a buried layer,” IEEE Transactions on Electron Devices, v 60, n 7, p 2428-2431, 2013, SCI.

[7] Junji Cheng*; Xingbi Chen; “A novel low-side structure for OPTVLD-SPIC technologically compatible with BiCMOS,” IEEE ISPSD, p 123-126, 2013, 国际会议.

[8] Junji Cheng*; Xingbi Chen; “Low specific on-resistance p-type OPTVLD-LDMOS with double hole-conductive paths for SPIC application,” IEEE ISPSD, p 225-228, 2012，国际会议.

[9] Junji Cheng*; Shiying Wu; Weizhen Chen; Haimeng Huang; Bo Yi; A Trench LDMOS Improved by Quasi Vertical Super Junction and Resistive Field Plate, IEEE J. Electron Devices Soc., 2019, 7(1): 682-689. SCI.

[10] Junji Cheng*; Ping Li; Weizhen Chen; Bo Yi; Xingbi Chen; Simulation Study of a Super-Junction Deep-Trench LDMOS With a Trapezoidal Trench, IEEE J. Electron Devices Soc., 2018, 6: 1091-1096. SCI.

[11] Junji Cheng*; Ping Li; Weizhen Chen; Bo Yi; Xingbi Chen; Simulation Study of a Deep-Trench LDMOS with Bilateral Super-Junction Drift Regions, 41st International Convention on Information and Communication Technology (MIPRO), 克罗地亚，2018-5-21至2018-5-25, 国际会议口头报告.

[12] Junji Cheng*; Xingbi Chen; “Hot-carrier reliability in OPTVLD-LDMOS,” Journal of Semiconductors, v 33, n 6, June 2012, EI.

[13] Weizhen Chen; Junji Cheng*（通讯）; Xingbi Chen; A Novel IGBT With High-k Dielectric Modulation Achieving Ultralow Turn-Off Loss, IEEE Trans. Electron Devices, 2020, 67(3): 1066-1070. SCI.

[14] Weizhen Chen; Junji Cheng*（通讯）; Haimeng Huang; Bingke Zhang; Xingbi Chen; The Oppositely Doped Islands IGBT Achieving Ultralow Turn Off Loss, IEEE TED, 2019, 66(8): 3690-3693. SCI.

[15] Weizhen Chen*; Junji Cheng*（通讯）; Jingjie Lin; Xingbi Chen; Simulation Study on the High-k SJ-VDMOS with Gradient Side-Wall, 41st IEEE MIPRO, 克罗地亚，2018-5-21至2018-5-25, 国际会议口头报告.

[16] Weizhen Chen; Junji Cheng*（通讯）; Study on the IGBT Using a Deep Trench Filled with SiO2 and High-k Dielectric Film, IEEE J. Electron Devices Soc., 2020, SCI.

[17] Jingjie Lin; Junji Cheng*（通讯）; Ping Li; Weizhen Chen; Haimeng Huang; Study on SrTiO₃ film for the application of power devices, Superlattices and Microstructures, 2019, 130: 168-174. SCI.

[18] Songnan Guo; Junji Cheng*（通讯）; Xingbi Chen; LDMOS with Variable-k Dielectric for Improved Breakdown Voltage and Specific On-resistance, J. Semic. Technology and Science, 2019, 19(5): 454-460. SCI.

[19] Jingjie Lin; Ping Li; Junji Cheng*（通讯）; Jiayu Wu; Bo Yi; Xingbi Chen. A novel snapback-free reverse-conducting (RC) SOI-LIGBT with a built-in thyristor, IEICE Electronics Express, 2019, 16(24): 1-4. SCI.

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