Affilication of Author(s): 电子科技大学
Patent desc: 一种新型互补MOS集成电路基本单元，涉及微电子技术和半导体技术。本发明的新型互补MOS集成电路基本单元采用一种新型的TMOS结构，该结构为纵向结构，在纵向上分别设置有源极半导体区域、沟道半导体区域以及漏极半导体区域；在水平方向上四周环绕着栅极区域，栅极与沟道半导体区之间设置有栅介质层，底部漏极可通过刻槽的方式从外侧引出。本发明所要解决的关键技术问题是：提供一种新型CMOS基本单元，实现大规模集成电路集成度的显著提高；以及由于加入了轻掺杂漂移区，能够有效提升器件的耐压，降低沟道长度减小对器件和电路耐压的影响
Application Number: CN201911306288.4
Authorization number: CN111063685B
Service Invention or Not: no
Application Date: 2019-12-28
Authorization Date: 2023-04-14
Publication Date: 2020-04-24
Associate Professor
Supervisor of Master's Candidates
Gender : Male
Education Level : With Certificate of Graduation for Doctorate Study
Degree : Doctor of Engineering
Status : Professor
Date of Employment : 1999-07-01
Discipline:Microelectronics and Solid State Electronics
Email : 10049f2ecec39b2772b40bd0e537871cbdca7f4e3be4c542f66a58a33a971c30c504d9b05fe02e941ce4694a8b2d8a41e5c6b3c49467aba6cde4f1c39537e3fd98018c3f23962998d7aab91502db5e1fc216748b215e9adb26612190beeb2da4e64e2b62b522173ab5d81e13f0628c4c35db3bcb10594fee326300b0e55bb1d1
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