A 93.4–104.8-GHz 57-mW Fractional-N Cascaded PLL With True In-Phase Injection-Coupled QVCO in 65-nm CMOS Technology

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Affiliation of Author(s):Massachusetts Institute of Technology (MIT)

Journal:IEEE Transactions on Microwave Theory and Techniques (TMTT)

Place of Publication:USA

Key Words:Cascaded phase-locked loop (PLL), CMOS voltage-controlled oscillator (VCO), frequency synthesizer

Abstract:A fully integrated 93.4-104.8-GHz 57-mW fractional-N cascaded phase-locked loop (PLL) with true in-phase injection-coupled quadrature voltage-controlled oscillator (QVCO) is reported. By cascading the fractional-N PLL and the subsampling PLL, good phase noise, high resolution, and wide acquisition range are achieved simultaneously. The transformer-based true in-phase injection coupled technique is adopted in the QVCO to obtain both low phase noise and low-power consumption. The proposed cascaded PLL was fabricated in a 65-nm CMOS technology with silicon size of 0.88 mm2.

Note:https://ieeexplore.ieee.org/document/8686223

All the Authors:Guangyin Feng,Fanyi Meng,Cheng Wang,Chenyang Li,Kaituo Yang,Bei Liu,Chirn Chye Boon

First Author:Xiang Yi

Indexed by:Journal

Correspondence Author:Zhipeng Liang

Document Code:10.1109/TMTT.2019.2906614

Discipline:Engineering

First-Level Discipline:Electronic science and technology

Volume:67

Issue:6

Page Number:2370-2381

Translation or Not:no

Date of Publication:2019-06-01

Date of Publication:2019-06-01