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Paper Publications
- 2017-08-17
[1] et al and A.W. Ruan , A Stream-Mode Based HW/SW Co-Emulation System for SOC Test and Verification
- 2017-08-17
[2] et al and A.W. Ruan , A Parasitic Effect – Free Test Scheme for Ferroelectric Random Access Memory (FRAM)
- 2017-08-17
[3] et al and A.W. Ruan , A Self-Defined Communication Protocol of Transport Layer in Hierarchy Transaction – Level Architecture for SOC Verification
- 2017-08-17
[4] et al and A.W. Ruan , Adjustable Gain CTIA Cell with Variable Integration Time for IRFPA Applications
- 2017-08-17
[5] et al and A.W. Ruan , An ALU-Based Universal Architecture for FIR Filters
- 2017-08-17
[6] et al and A.W. Ruan , Automatic Configuration Generation for A SOC Co-Verification Technology Based FPGA Functional Test System
- 2017-08-17
[7] et al and A.W. Ruan , An Automatic Test Approach for Field Programmable Gate Array (FPGA)
- 2017-08-17
[8] et al , A.W. Ruan , and X. Cheng , A Run-Time RTL Debugging Methodology for FPGA-based Co-Simulation
- 2017-08-17
[9] et al , Aiwu Ruan , and Haocheng Huang , A New Event Driven Testbench Synthesis Engine for FPGA Emulation
- 2017-08-17
[10] et al , Aiwu Ruan , and Haocheng Huang , A New Event Driven Testbench Synthesis Engine for FPGA Emulation
- 2017-08-17
[11] et al and A.W. Ruan , Debugging Methodology for A Synthesizable Testbench FPGA Emulator
- 2017-08-17
[12] B. Hu , A.W. Ruan , and K. Shen , Design of A Control Circuit for A User Reconfigurable ROIC for IRFPA Applications
- 2017-08-17
[13] et al and A.W. Ruan , Performance Estimation for A EDA Tool Based HW/SW Co-Verification Environment
- 2017-08-17
[14] 阮爱武 项传银 , 基于故障映射的FPGA互连资源故障测试与定位
- 2017-08-17
[15] et al and A.W. Ruan , Graph Theory for FPGA Minimum Configurations
- 2017-08-17
[16] et al and A.W. Ruan , SOC HW/SW Co-Verification Based Debugging Technique
- 2017-08-17
[17] et al and Aiwu Ruan , A Built-In Self-Test (BIST) System with Non-Intrusive TPG and ORA for FPGA Test and Diagnosis
- 2017-08-17
[18] et al and Aiwu Ruan , Insight into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs
- 2017-08-17
[19] et al and Aiwu Ruan , A bitstream readback-based automatic functional test and diagnosis
- 2017-08-17
[20] A.W. Ruan , SOC HW/SW Co-Verification Technology for Application of FPGA Test and Diagnosis