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个人信息Personal Information
教授 博士生导师
性别:男
毕业院校:东南大学
学历:博士研究生毕业
学位:工学博士学位
在职信息:在职人员
所在单位:电子科学与工程学院
办公地点:四号科研楼A区
团队有关一种基于叠层芯片工艺的紧凑型四通道砷化镓收发波束成形器的成果在IEEE AWPL期刊上发表
发布时间:2026-01-07 点击次数:
论文名称:A GaAs Four-Channel TRx Beamformer With Compact Size Based on Stacked-Chip Process。本文介绍了一款采用三维堆叠芯片架构的四通道射频收发波束成形器,重点阐述其创新结构与性能特征。该设计采用两层键合金微凸块,并在器件与通道间设置隔离柱结构——通过金微凸块与砷化镓衬底通孔工艺实现。这些隔离柱专门设计用于抑制耦合效应,从而显著提升隔离度。该三维堆叠芯片通过异质集成方式,将CMOS芯片、砷化镓承载基板及砷化镓单片微波集成电路垂直堆叠构成。所提出的三维堆叠MMIC在5.8×5.8×0.4 mm的紧凑尺寸内实现了高度集成。在32-38 GHz的全工作带宽内,发射通道输出功率达27 dBm,接收通道噪声系数为3.5 dB。测试结果表明,该三维堆叠MMIC具备卓越的可靠性、优异的性能指标及规模化生产的可行性。
工作主要完成人:王磊,王鼎,程钰间。
论文链接:https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11010892
Abstract—This letter introduces a compact 3-D stacked chip design for a four-channel RF TRx beamformer, emphasizing its innovative structure and performance attribute. The design leverages two layers of bonded Au micro-bumps and incorporates isolation piers between devices and channels, which are facilitated by the use of Au micro-bumps and gallium arsenide (GaAs) through substrate via. These isolation piers are specifically engineered to mitigate coupling, thereby significantly enhancing isolation. The 3-D stacked chip is formed through the vertical stacking of a CMOS chip, GaAs carrier, and GaAs monolithic microwave integrated circuit (MMIC) in a heterogeneous inte gration. This proposed 3-D stacked MMIC achieves a high level of integration within compact dimensions of 5.8 × 5.8 × 0.4 mm. Across the entire operational bandwidth of 32–38 GHz, the transmitted signals reach an output power of 27 dBm, while the receiving channel demonstrates a noise figure (NF) of 3.5 dB. The measured results substantiate that the 3-D stacked MMIC offers exceptional reliability, superior performance, and feasibility for mass production.
Index Terms—3-D integration, Au micro-bump, gallium arsenide (GaAs), vertical interconnect.
