点击次数：

所属单位：Massachusetts Institute of Technology (MIT)

发表刊物：IEEE Journal of Solid-State Circuits (JSSC)

刊物所在地：USA

关键字：CMOS, compact electromagnetic design, heterodyne sub-terahertz receiver, high-density scalable array

摘要：This paper reports a 32-unit phase-locked dense heterodyne receiver array at fRF = 240 GHz. To synthesize a large receiving aperture without large sidelobe response, this chip has the following two features. The first feature is the small size of the heterodyne receiver unit, which is only λ(fRF)/4 × λ(fRF)/2. It allows for the integration of two interleaved 4 × 4 arrays within a 1.2 mm2 die area for concurrent steering of two independent beams. Such unit compactness is enabled by the multi-functionality of the receiver structure, which simultaneously accomplishes local oscillator (LO) generat

备注：https://ieeexplore.ieee.org/document/8637931

全部作者：Cheng Wang

第一作者：Zhi Hu

论文类型：期刊

通讯作者：Ruonan Han

论文编号：10.1109/JSSC.2019.2893231

学科门类：工学

卷号：54

期号：5

页面范围：1216-1227

是否译文：否

发表时间：2019-05-01