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个人信息Personal Information
教授 博士生导师
性别：男
毕业院校：Massachusetts Institute of Technology
学历：博士研究生毕业
学位：哲学博士学位
在职信息：在职人员
所在单位：电子科学与工程学院
入职时间：2021-02-20
学科：电路与系统
办公地点：清水河校区科研4号楼A区232房间
曾获荣誉：2024，四川青年五四奖章
2023，麻省理工学院科技创新35岁以下35人（中国）
2020, IEEE SSCS Predoctoral Achievement Award
2019, MIT MTLDoctoral Dissertation Seminar
2018, 2018年度国家优秀自费留学生奖学金
2016, ADI Outstanding Student Designer Award
扫描关注
- [1] A Scalable 134-to-141GHz 16-Element CMOS 2D λ/2-Spaced Phased Array, 2024 IEEE International Solid-State Circuits Conference (ISSCC),
- [2] A Cryo-CMOS Parametric Frequency Divider With −189.1 dBm/Hz Output Noise Floor at 4.2 K for High-Fidelity All-Parametric Quantum Reflectometer, IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS, vol. 33, no. 12, pp. 1650-1653, Dec 2023.
- [3] A Cryo-CMOS 4.5~7GHz Dual-Qubit Homodyne Reflectometer Array with High Q Degenerate Parametric Amplifier Through Dynamic Mode Coupling, IEEE 2023 Asian Solid-State Circuits Conference (ASSCC), Nov 2023.
- [4] 34.5 A Calibration-Free 12.8-16.5GHz Cryogenic CMOS VCO with 202dBc/Hz FoM for Classic-Quantum Interface, 2023 IEEE International Solid-State Circuits Conference (ISSCC), pp. 512-513, Feb 2023.
- [5] Cheng Wang , Xiang Yi , J. Mawdsley , Mina Kim , Zihan Wang , and Ruonan Han , An on-chip fully-electronic molecular clock based on sub-terahertz rotational spectroscopy, Nature Electronics, vol. 1, no. 7, pp. 1-7, Jul 2018.
- [6] Cheng Wang , Xiang Yi , Mina Kim , and Ruonan Han , 29.5 Sub-THz CMOS molecular clock with 43ppt long-term stability using high-order rotational transition probing and slot array couplers, 2020 IEEE International Solid-State Circuits Conference (ISSCC), pp. 448-449, Feb 2020.
- [7] X. Yi , C. Wang , M. Lu , J. Wang , J. Grajal , and R. Han , 4.8 A Terahertz FMCW comb radar in 65nm CMOS with 100GHz bandwidth, 2020 IEEE International Solid-State Circuits Conference (ISSCC), pp. 90-91, Feb 2020.
- [8] Cheng Wang and Ruonan Han , 17.6 Rapid and energy-efficient molecular sensing using dual mm-Wave combs in 65nm CMOS: A 220-to-320GHz spectrometer with 5.2mW radiated power and 14.6-to-19.5dB noise figure, 2017 IEEE International Solid-State Circuits Conference (ISSCC), pp. 302-303, Feb 2017.
- [9] Cheng Wang , Xiang Yi , Mina Kim , Yaqing Zhang , and Ruonan Han , A CMOS molecular clock probing 231.061-GHz rotational line of OCS with sub-ppb long-term stability and 66-mW DC power, 2018 Symposium on VLSI Circuits (VLSI), pp. 113-114, Jun 2018.
- [10] Cheng Wang , Xiang Yi , Mina Kim , Qingyu Yang , and Ruonan Han , A Terahertz molecular clock on CMOS using high-harmonic-order interrogation of rotational transition for medium/long-term stability enhancement, IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 2, pp. 566-580, Feb 2021.
- [11] Cheng Wang , Xiang Yi , J. Mawdsley , Mina Kim , Zhi Hu , Yaqing Zhang , B. Perkins , and Ruonan Han , Chip-scale molecular clock, IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 4, pp. 914-926, Apr 2019.
- [12] Cheng Wang and Ruonan Han , Dual-Terahertz-Comb spectrometer on CMOS for rapid, wide-range gas detection with absolute specificity, IEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 12, pp. 3361-3372, Dec 2017.
- [13] Cheng Wang , B. Perkins , Z. Wang , and Ruonan Han , Molecular detection for unconcentrated gas with ppm sensitivity using 220-to-320 GHz Dual-Frequency-Comb spectrometer in CMOS, IEEE Transaction on Biomedical Circuits and Systems (BioCAS), vol. 12, no. 3, pp. 709-721, Jun 2018.
- [14] Xiang Yi , J. Wang , M. Colangelo , Cheng Wang , K. E. Kolodziej , and Ruonan Han , Realization of in-band full-duplex operation using bilateral single-sideband frequency conversion, IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 5, pp. 1387-1397, May 2021.
- [15] Xiang Yi , Cheng Wang , X. Chen , J. Wang , J. Grajal , and Ruonan Han , A 220-to-320-GHz FMCW Radar in 65-nm CMOS Using A Frequency-Comb Architecture, IEEE Journal of Solid-State Circuits (JSSC), vol. 56, no. 2, pp. 327-339, Feb 2021.
- [16] Zhi Hu , Cheng Wang , and Ruonan Han , A 32-Unit 240-GHz heterodyne receiver array in 65-nm CMOS with array-wide phase locking, Journal of Solid-State Circuits (JSSC), vol. 54, no. 5, pp. 1216-1227, May 2019.
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